1. Field of the Invention
This invention relates to copper electrical conductors on a thin film semiconductor device and more particularly to an passivation of an exposed surface of a copper conductor.
2. Description of Related Art
U.S. Pat. No. 5,420,069 of Joshi et al. for "Method of Making Corrosion Resistant, Low Resistivity Copper for Interconnect Metal Lines" shows a copper line with Cu.sub.3 Ge layers on the sidewalls and top. It shows a "corrosion resistant thin film interconnect material, comprising a bilayer formed of a copper (Cu) film over which a layer of Cu.sub.3 Ge or copper germanium (Ge) alloy has been deposited." In FIG. 3B, Joshi et al. " . . . shows Cu--Ge passivation layer 180 on all exposed surfaces of copper." This provides "excellent passivation properties". The preferred process described is "selective deposition of germanium over copper surfaces . . . exposing the original Copper (Cu) layer (or surface) at a low pressure (0.5 Torr to 1 Torr) to a source of germanium, e.g. GeH.sub.4 gas, in a chemical vapor deposition (CVD) reactor at temperatures ranging from about 200.degree.-450.degree. C. to convert the outer surface of the Cu lines to Cu(x)Ge(y) or Cu.sub.3 Ge . . . . Any Ge containing gas source, e.g. GeH.sub.4, GeH.sub.6 and the like can be used . . . . It is noted that by increasing the partial pressure of GeH.sub.4 more than 0.1 Torr, the Cu(x)Ge(y) alloy can be changed to Cu.sub.3 Ge or additional Ge can be formed." Copper "rich phases and . . . specifically Cu.sub.3 Ge may also be produced by plating (electrolytic and electroless), sintered powder and sputtered bilayers which are subsequently reacted.
U.S. Pat. No. 5,288,456 of Aboelfotoh et al. for "Compound with Room Temperature Electrical Resistivity Comparable to that of Elemental Copper" shows a process for producing copper germanide Cu.sub.3 Ge compound on the surface of a silicon substrate which had been treated by evacuation to a pressure of 1.times.10.sup.-7 Torr for a period of time following which Ge, Ga and copper were deposited sequentially in an evacuated chamber at room temperature to avoid contact with air or oxygen. A thin film of 700 .ANG. of germanium (Ge) was deposited on a &lt;100&gt; surface of the silicon substrate. Then 5-10 atomic percent of gallium (Ga) was deposited on the Ge film followed by deposition of copper (Cu) to a thickness of about 1300 .ANG.. Then the result of the process to this point is annealed at a temperature of about 400.degree. C. in situ for 30 minutes in vacuum. The result is a thin layer of the Ge.sub.3 Cu compound with a thickness of about 2000 .ANG. thickness on the surface which has 1-2% of Ga incorporated therein.
U.S. Pat. No. 5,731,245 of Joshi et al. for "High Aspect Ratio Low Resistivity Lines/Vias with Tungsten Alloy Hard Cap" discusses copper/germanium barrier layers.
U.S. Pat. No. 5,060,050 of Tsuneoka et al. for "Semiconductor Integrated Circuit Device" shows a copper wire process.
Copper, due to the lack of its self-passivation as the result of oxidation, is easily oxidized throughout a copper film which is unsatisfactory for copper conductor lines.
In the past, various techniques for surface-passivation of copper have been proposed.
We find that direct selective CVD growth on the top surface and sidewalls of a copper (Cu) line to form a Cu.sub.3 Ge layer thereon will lead to the problem of poor coverage at the top corner.